Arch.Y86.Machine.Seq.Student
Class CPU
java.lang.Object
java.util.Observable
Machine.AbstractCPU
Arch.Y86.Machine.AbstractY86CPU
Arch.Y86.Machine.Seq.Student.CPU
public class CPU
- extends AbstractY86CPU
Fields inherited from class Arch.Y86.Machine.AbstractY86CPU |
A_ADDL, A_ANDL, A_SUBL, A_XORL, BUBBLE, d, e, f, I_CALL, I_HALT, I_IADDL, I_IRMOVL, I_JMPI, I_JXX, I_LEAVE, I_MRMOVL, I_NOP, I_OPL, I_POPL, I_PUSHL, I_RET, I_RMMOVL, I_RRMOVL, J_E, J_G, J_GE, J_L, J_LE, J_NC, J_NE, m, NORMAL, p, R_EBP, R_ESP, R_NONE, STALL, w |
Method Summary |
protected void |
cycle()
Execute one clock cycle with all stages executing in parallel. |
protected void |
decode()
The DECODE stage of CPU |
protected void |
execute()
The EXECUTE stage of CPU |
protected void |
fetch()
The FETCH stage of CPU |
protected void |
memory()
The MEMORY stage of CPU |
protected void |
nextPC()
The NEXT PC pseudo-stage of the CPU |
protected void |
writeBack()
The WRITE BACK stage of CPU |
Methods inherited from class Arch.Y86.Machine.AbstractY86CPU |
createDecodeStageState, createExecuteStageState, createFetchStageState, createMemoryStageState, createProcessorState, createWriteBackStageState, cyclePipe, cycleSeq, fetch_SelectPC, pipelineHazardControl, setPC |
Methods inherited from class java.util.Observable |
addObserver, clearChanged, countObservers, deleteObserver, deleteObservers, hasChanged, notifyObservers, notifyObservers, setChanged |
Methods inherited from class java.lang.Object |
clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait |
CPU
public CPU(MainMemory aMem)
cycle
protected void cycle()
throws AbstractCPU.InvalidInstructionException,
AbstractMainMemory.InvalidAddressException,
AbstractCPU.MachineHaltException
- Execute one clock cycle with all stages executing in parallel.
- Specified by:
cycle
in class AbstractCPU
- Throws:
InvalidInstructionException
- if instruction is invalid (including invalid register number)
AbstractMainMemory.InvalidAddressException
- if instruction attemps an invalid memory access (either instruction or data)
MachineHaltException
- if instruction halts the CPU
AbstractCPU.InvalidInstructionException
AbstractCPU.MachineHaltException
fetch
protected void fetch()
throws AbstractCPU.InvalidInstructionException,
AbstractMainMemory.InvalidAddressException
- The FETCH stage of CPU
- Specified by:
fetch
in class AbstractY86CPU
- Throws:
InvalidInstructionException
- if instruction opcode or format is invalid
AbstractMainMemory.InvalidAddressException
- if current pc is invalid
AbstractCPU.InvalidInstructionException
decode
protected void decode()
throws RegisterSet.InvalidRegisterNumberException
- The DECODE stage of CPU
- Specified by:
decode
in class AbstractY86CPU
- Throws:
RegisterSet.InvalidRegisterNumberException
- if instruction attempts to access register number > 7
execute
protected void execute()
- The EXECUTE stage of CPU
- Specified by:
execute
in class AbstractY86CPU
memory
protected void memory()
throws AbstractMainMemory.InvalidAddressException
- The MEMORY stage of CPU
- Specified by:
memory
in class AbstractY86CPU
- Throws:
AbstractMainMemory.InvalidAddressException
- if instruction attempts to access an invalid memory address
writeBack
protected void writeBack()
throws AbstractCPU.MachineHaltException,
RegisterSet.InvalidRegisterNumberException
- The WRITE BACK stage of CPU
- Specified by:
writeBack
in class AbstractY86CPU
- Throws:
MachineHaltException
- if instruction halts the CPU (e.g., halt instruction)
RegisterSet.InvalidRegisterNumberException
- if instruction attempts to access register number > 7
AbstractCPU.MachineHaltException
nextPC
protected void nextPC()
- The NEXT PC pseudo-stage of the CPU
- Overrides:
nextPC
in class AbstractY86CPU